This invention generally relates to ceramic electronic packaging. Specifically, there is a multilayered low temperature co-fired ceramic assembly (LTCC) with a constraining core to minimize shrinkage of outer ceramic layers during firing. The outer ceramic layers have high density circuit features patterned thereon.
Various devices are well known for providing ceramic packages for semiconductor devices and passive components. One of the prior art designs is a low temperature co-fired ceramic (LTCC) substrate. The LTCC ceramic is made of layers of ceramic material, which in an unfired state, are called green tapes. Circuit lines, resistors, capacitors, bonding pads and vias are created on the surface and in holes of the green tapes by conventional thick film screening techniques. The layers are stacked on top of each other laminated and fired at a relatively low temperature in a furnace. During firing, the LTCC shrinks along the x, y and z axes typically 10-20 percent depending upon the LTCC formulation.
Despite the advantages of the prior art LTCC designs, problems occur with the registration or alignment of the circuit lines and components on the exterior surfaces during manufacturing. During firing, the shrinkage of the LTCC causes the external features to vary with respect to true position. This true position error can cause misalignment when attaching components or printing post-fire materials, resulting in a defective part that is non-repairable and has to be discarded.
Examples of a patent related to the present invention is as follows, and is herein incorporated by reference for related and supporting teachings:
U.S. Pat. No. 5,518,969, is a process for producing low shrink ceramic compositions.
The foregoing patent reflects the state of the art of which the applicant is aware and is tendered with the view toward discharging applicants"" acknowledged duty of candor in disclosing information that may be pertinent in the examination of this application. It is respectfully stipulated, however, that this patent does not teach or render obvious, singly or when considered in combination, applicants"" claimed invention.
It is a feature of the invention to provide a low temperature co-fired ceramic assembly (LTCC) with a constraining core to minimize shrinkage of outer ceramic layers during firing.
A further feature of the invention is to provide a multilayered low temperature co-fired ceramic assembly that has high density circuit features. A ceramic core includes a first and a second ceramic layer. Several via holes are located in the first and second ceramic layers. Several low density circuit features are located on the first and second layers. A third and a fourth ceramic layers have the ceramic core located in between. The third and the fourth ceramic layers have several via holes and high density circuit features. The circuit features are selected from the group of resistors, capacitors, circuit lines, vias, inductors, or bond pads.
A further feature of the invention is to provide a method of making a multilayered low temperature co-fired ceramic assembly with high density circuit features, the method includes: providing at least a first and a second ceramic layer; punching a plurality of via holes in the first and second ceramic layers; screen printing a plurality of low density circuit features on the first and second layers; stacking the first ceramic layer onto the second ceramic layer; firing the first and second ceramic layers in a furnace such that a ceramic core is formed; providing at least a third and a fourth ceramic layer; punching a plurality of via holes in the third and fourth ceramic layers; screen printing a plurality of high density circuit features on the third and fourth ceramic layers; stacking the ceramic core onto the fourth ceramic layer and stacking the third ceramic layer onto the ceramic core; and firing the third and fourth ceramic layers and the ceramic core in a furnace such that the assembly is formed. The assembly has high density circuit features. The circuit features are selected from the group of: resistors, capacitors, circuit lines, vias, inductors, or bond pads.
The invention resides not in any one of these features per se, but rather in the particular combination of all of them herein disclosed and claimed. Those skilled in the art will appreciate that the conception, upon which this disclosure is based, may readily be utilized as a basis for the designing of other structures, methods and systems for carrying out the several purposes of the present invention. Further, the abstract is neither intended to define the invention of the application, which is measured by the claims, neither is it intended to be limiting as to the scope of the invention in any way.